SnapKV: LLM Knows What You are Looking for Before Generation

1 code implementation • 22 Apr 2024 • Yuhong Li, Yingbing Huang, Bowen Yang, Bharat Venkitesh, Acyr Locatelli, Hanchen Ye, Tianle Cai, Patrick Lewis, Deming Chen

Specifically, SnapKV achieves a consistent decoding speed with a 3. 6x increase in generation speed and an 8. 2x enhancement in memory efficiency compared to baseline when processing inputs of 16K tokens.

16k

Subgraph Extraction-based Feedback-guided Iterative Scheduling for HLS

no code implementations • 22 Jan 2024 • Hanchen Ye, David Z. Pan, Chris Leary, Deming Chen, Xiaoqing Xu

This paper proposes ISDC, a novel feedback-guided iterative system of difference constraints (SDC) scheduling algorithm for high-level synthesis (HLS).

Scheduling

HybridDNN: A Framework for High-Performance Hybrid DNN Accelerator Design and Implementation

no code implementations • 8 Apr 2020 • Hanchen Ye, Xiaofan Zhang, Zhize Huang, Gengsheng Chen, Deming Chen

To speedup Deep Neural Networks (DNN) accelerator design and enable effective implementation, we propose HybridDNN, a framework for building high-performance hybrid DNN accelerators and delivering FPGA-based hardware implementations.